SRAM Arrays with Built-in Parity Computation for Real-Time Error Detection in Cache Tag Arrays - researchr publication authors

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Ramon Canal, Yiannakis Sazeides, Arkady Bramnik. SRAM Arrays with Built-in Parity Computation for Real-Time Error Detection in Cache Tag Arrays. In Design, Automation & Test in Europe Conference & Exhibition, DATE 2021, Grenoble, France, February 1-5, 2021. pages 711-716, IEEE, 2021. [doi]

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