Hardware Design of a FPGA-Based Synchronizer for Hiperlan/2 - researchr publication authors

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Ma José Canet, Felip Vicedo, Vicenc Almenar-Terre, Javier Valls-Coquillat, Eduardo R. de Lima. Hardware Design of a FPGA-Based Synchronizer for Hiperlan/2. In Jürgen Becker, Marco Platzner, Serge Vernalde, editors, Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings. Volume 3203 of Lecture Notes in Computer Science, pages 494-504, Springer, 2004. [doi]

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