Ma José Canet, Felip Vicedo, Vicenc Almenar-Terre, Javier Valls-Coquillat, Eduardo R. de Lima. Hardware Design of a FPGA-Based Synchronizer for Hiperlan/2. In Jürgen Becker, Marco Platzner, Serge Vernalde, editors, Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings. Volume 3203 of Lecture Notes in Computer Science, pages 494-504, Springer, 2004. [doi]
@inproceedings{CanetVAVL04,
title = {Hardware Design of a FPGA-Based Synchronizer for Hiperlan/2},
author = {Ma José Canet and Felip Vicedo and Vicenc Almenar-Terre and Javier Valls-Coquillat and Eduardo R. de Lima},
year = {2004},
url = {http://springerlink.metapress.com/openurl.asp?genre=article&issn=0302-9743&volume=3203&spage=494},
tags = {rule-based, synchronization, design},
researchr = {https://researchr.org/publication/CanetVAVL04},
cites = {0},
citedby = {0},
pages = {494-504},
booktitle = {Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings},
editor = {Jürgen Becker and Marco Platzner and Serge Vernalde},
volume = {3203},
series = {Lecture Notes in Computer Science},
publisher = {Springer},
isbn = {3-540-22989-2},
}