Serge Vernalde - researchr alias

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Viewing Publication 1 - 45 from 45

2004

Network-on-Chip for Reconfigurable Systems: From High-Level Design Down to ImplementationAndrei Bartic, Dirk Desmet, Jean-Yves Mignolet, Théodore Marescaux, Diederik Verkest, Serge Vernalde, Rudy Lauwereins, J. Miller, Frédéric Robert. fpl 2004: 637-647 [doi]

Run-time support for heterogeneous multitasking on reconfigurable SoCsThéodore Marescaux, Vincent Nollet, Jean-Yves Mignolet, Andrei Bartic, W. Moffat, Prabhat Avasare, Paul Coene, Diederik Verkest, Serge Vernalde, Rudy Lauwereins. integration, 38(1):107-130, 2004. [doi]

Design Methodology for a Tightly Coupled VLIW/Reconfigurable Matrix Architecture: A Case StudyBingfeng Mei, Serge Vernalde, Diederik Verkest, Rudy Lauwereins. date 2004: 1224-1229 [doi]

Operating-system controlled network on chipVincent Nollet, Théodore Marescaux, Diederik Verkest, Jean-Yves Mignolet, Serge Vernalde. dac 2004: 256-259 [doi]

A hybrid design-time/run-time scheduling flow to minimise the reconfiguration overhead of FPGAsJavier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor. mam, 28(5-6):291-301, 2004. [doi]

Interconnect architectures for modulo-scheduled coarse-grained reconfigurable arraysSteven J. E. Wilton, Noha Kafafi, Bingfeng Mei, Serge Vernalde. fpt 2004: 33-40 [doi]

2003

Highly scalable network on chip for reconfigurable systemsT. Andrei Bartic, Jean-Yves Mignolet, Vincent Nollet, Théodore Marescaux, Diederik Verkest, Serge Vernalde, Rudy Lauwereins. issoc 2003: 79-82 [doi]

Networks on Chip as Hardware Components of an OS for Reconfigurable SystemsThéodore Marescaux, Jean-Yves Mignolet, Andrei Bartic, W. Moffat, Diederik Verkest, Serge Vernalde, Rudy Lauwereins. fpl 2003: 595-605 [doi]

ADRES: An Architecture with Tightly Coupled VLIW Processor and Coarse-Grained Reconfigurable MatrixBingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins. fpl 2003: 61-70 [doi]

Exploiting Loop-Level Parallelism on Coarse-Grained Reconfigurable Architectures Using Modulo SchedulingBingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins. date 2003: 10296-10301 [doi]

Infrastructure for Design and Management of Relocatable Tasks in a Heterogeneous Reconfigurable System-on-ChipJean-Yves Mignolet, Vincent Nollet, Paul Coene, Diederik Verkest, Serge Vernalde, Rudy Lauwereins. date 2003: 10986-10993 [doi]

Flexible system model and architectural exploration for HIPERLAN 2 DLC wireless LAN protocolVivek Nema, Bart van Poucke, Miguel Glassee, Serge Vernalde. icc 2003: 111-115 [doi]

A framework for mapping scalable networked applications on run-time reconfigurable platformsNam Pham Ngoc, Gauthier Lafruit, Jean-Yves Mignolet, Serge Vernalde, Geert Deconinck, Rudy Lauwereins. icmcs 2004: 469-472 [doi]

Hierarchical Run-Time Reconfiguration Managed by an Operating System for Reconfigurable SystemsVincent Nollet, Jean-Yves Mignolet, Andrei Bartic, Diederik Verkest, Serge Vernalde, Rudy Lauwereins. ersa 2003: 81-87

Designing an Operating System for a Heterogeneous Reconfigurable SoVincent Nollet, Paul Coene, Diederik Verkest, Serge Vernalde, Rudy Lauwereins. ipps 2003: 174 [doi]

Run-Time Scheduling for Multimedia Applications on Dynamically Reconfigurable SystemsJavier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor. estimedia 2003: 156-162

Run-Time Minimization of Reconfiguration Overhead in Dynamically Reconfigurable SystemsJavier Resano, Daniel Mozos, Diederik Verkest, Serge Vernalde, Francky Catthoor. fpl 2003: 585-594 [doi]

Application of Task Concurrency Management on Dynamically Reconfigurable Hardware PlatformsJavier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor. fccm 2003: 278-279 [doi]

Performance Analysis for Identification of (Sub-)Task-Level Parallelism in JavaRichard Stahl, Robert Pasko, Luc Rijnders, Diederik Verkest, Serge Vernalde, Rudy Lauwereins, Francky Catthoor. scopes 2003: 313-328 [doi]

2002

Adding Hardware Support to the HotSpot Virtual Machine for Domain Specific ApplicationsYajun Ha, Radovan Hipik, Serge Vernalde, Diederik Verkest, Marc Engels, Rudy Lauwereins, Hugo De Man. fpl 2002: 1135-1138 [doi]

Building a Virtual Framework for Networked Reconfigurable Hardware and Software ObjectsYajun Ha, Serge Vernalde, Patrick Schaumont, Marc Engels, Rudy Lauwereins, Hugo De Man. tjs, 21(2):131-144, 2002.

Interconnection Networks Enable Fine-Grain Dynamic Multi-tasking on FPGAsThéodore Marescaux, Andrei Bartic, Diederik Verkest, Serge Vernalde, Rudy Lauwereins. fpl 2002: 795-805 [doi]

DRESC: a retargetable compiler for coarse-grained reconfigurable architecturesBingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins. fpt 2002: 166-173 [doi]

Techniques to Evolve a C++ Based System Design LanguageRobert Pasko, Serge Vernalde, Patrick Schaumont. date 2002: 302-309 [doi]

2001

Platform design approach for re-configurable network appliancesRadim Cmar, Robert Pasko, Jean-Yves Mignolet, Geert Vanmeerbeeck, Patrick Schaumont, Serge Vernalde. cicc 2001: 79-82 [doi]

Development of a Design Framework for Platform-Independent Networked Reconfiguration of Software and HardwareYajun Ha, Bingfeng Mei, Patrick Schaumont, Serge Vernalde, Rudy Lauwereins, Hugo De Man. fpl 2001: 264-274 [doi]

Virtual Java/FPGA interface for networked reconfigurationYajun Ha, Geert Vanmeerbeeck, Patrick Schaumont, Serge Vernalde, Marc Engels, Rudy Lauwereins, Hugo De Man. aspdac 2001: 558-563 [doi]

A SW/HW Interface API for Java/FPGA Co-Designed AppletsYajun Ha, Patrick Schaumont, Serge Vernalde, Marc Engels, Rudy Lauwereins, Hugo De Man. fccm 2001: 269-270 [doi]

Hardware/software partitioning of embedded system in OCAPI-xlGeert Vanmeerbeeck, Patrick Schaumont, Serge Vernalde, Marc Engels, Ivo Bolsens. codes 2001: 30-35 [doi]

2000

1999

1998

1997

Highly scalable parallel parametrizable architecture of the motion estimatorRadim Cmar, Serge Vernalde. date 1997: 208-212 [doi]

Synthesis of multi-rate and variable rate circuits for high speed telecommunications applicationsPatrick Schaumont, Serge Vernalde, Luc Rijnders, Marc Engels, Ivo Bolsens. date 1997: 542-546 [doi]

1996

Combined Control Flow Dominated and Data Flow Dominated High-Level SynthesisElisabeth Berrebi, Polen Kission, Serge Vernalde, S. De Troch, Jean-Claude Herluison, Jean Fréhel, Ahmed Amine Jerraya, Ivo Bolsens. dac 1996: 573-578 [doi]

A Hilbert fractal codec for region oriented compression of color imagesJan Bormans, Serge Vernalde, Jan Cornelis 0001, Ivo Bolsens, Hugo De Man. icecsys 1996: 41-44 [doi]

1994

ASIC synthesis of a flexible 80 Mbit/s Reed-Solomon CodecKoen Van Nieuwenhove, Kjell Cools, D. Devisch, Ivo Bolsens, Serge Vernalde, Kim Chansik, R. B. W. Lee, Oh Younguk. eurodac 1994: 658-663 [doi]

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2004

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