A high density, low leakage, 5T SRAM for embedded caches

Ingvar Carlson, Stefan Anderson, Sreedhar Natarajan, Atila Alvandpour. A high density, low leakage, 5T SRAM for embedded caches. In Michiel Steyaert, C. L. Claeys, editors, 33rd European Solid-State Circuits Conference, ESSCIRC 2004, Leuven, Belgium, September 21-23, 2004. pages 215-218, IEEE, 2004. [doi]

Abstract

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