Experiments on Bridging Fault Analysis and Layout-Level DFT for CMOS Designs

Antonio Casimiro, M. Simões, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira. Experiments on Bridging Fault Analysis and Layout-Level DFT for CMOS Designs. In Fabrizio Lombardi, Mariagiovanna Sami, Yvon Savaria, Renato Stefanelli, editors, The IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, October 27-29, 1993, Venice, Italy, Proceedings. pages 109-116, IEEE Computer Society, 1993.

Abstract

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