Rakesh Chadha, Chin-Fu Chen. Extension of a transistor level digital timing simulator to include first order analog behavior. In Computer Design: VLSI in Computers and Processors, ICCD 1988., Proceedings of the 1988 IEEE International Conference on, Rye Brook, NY, USA, October 3-5, 1988. pages 116-119, IEEE, 1988. [doi]
Abstract is missing.