A 4-nm 1.15 TB/s HBM3 Interface With Resistor-Tuned Offset Calibration and In Situ Margin Detection

Kwanyeob Chae, Jaegeun Song, Yoonjae Choi, Jiyeon Park, Billy Koo, Jihun Oh, Shinyoung Yi, Won Lee, Dongha Kim, Kyeongkeun Kang, Eunsu Kim, Juyoung Kim, Sanghune Park, Sungcheol Park, Mijung Noh, Hyo-Gyuem Rhew, Jongshin Shin. A 4-nm 1.15 TB/s HBM3 Interface With Resistor-Tuned Offset Calibration and In Situ Margin Detection. J. Solid-State Circuits, 59(1):231-242, January 2024. [doi]

Abstract

Abstract is missing.