Circuit performance optimization for local intra-die process variations using a gate selection metric - researchr publication authors

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Víctor H. Champac, Alejandra Nicte-ha Reyes, Andres F. Gomez. Circuit performance optimization for local intra-die process variations using a gate selection metric. In 2015 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2015, Daejeon, South Korea, October 5-7, 2015. pages 165-170, IEEE, 2015. [doi]

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