A deep sub-micron timing measurement circuit using a single-stage Vernier delay line

Antonio H. Chan, Gordon W. Roberts. A deep sub-micron timing measurement circuit using a single-stage Vernier delay line. In Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, CICC 2002, Orlando, FL, USA, May 12-15, 2002. pages 77-80, IEEE, 2002. [doi]

@inproceedings{ChanR02-0,
  title = {A deep sub-micron timing measurement circuit using a single-stage Vernier delay line},
  author = {Antonio H. Chan and Gordon W. Roberts},
  year = {2002},
  doi = {10.1109/CICC.2002.1012770},
  url = {https://doi.org/10.1109/CICC.2002.1012770},
  researchr = {https://researchr.org/publication/ChanR02-0},
  cites = {0},
  citedby = {0},
  pages = {77-80},
  booktitle = {Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, CICC 2002, Orlando, FL, USA, May 12-15, 2002},
  publisher = {IEEE},
  isbn = {0-7803-7250-6},
}