Designing efficient combinational compression architecture for testing industrial circuits

Anshuman Chandra, Santosh Kulkarni, Subramanian Chebiyam, Rohit Kapur. Designing efficient combinational compression architecture for testing industrial circuits. In 19th International Symposium on VLSI Design and Test, VDAT 2015, Ahmedabad, India, June 26-29, 2015. pages 1-6, IEEE, 2015. [doi]

@inproceedings{ChandraKCK15,
  title = {Designing efficient combinational compression architecture for testing industrial circuits},
  author = {Anshuman Chandra and Santosh Kulkarni and Subramanian Chebiyam and Rohit Kapur},
  year = {2015},
  doi = {10.1109/ISVDAT.2015.7208149},
  url = {http://dx.doi.org/10.1109/ISVDAT.2015.7208149},
  researchr = {https://researchr.org/publication/ChandraKCK15},
  cites = {0},
  citedby = {0},
  pages = {1-6},
  booktitle = {19th International Symposium on VLSI Design and Test, VDAT 2015, Ahmedabad, India, June 26-29, 2015},
  publisher = {IEEE},
  isbn = {978-1-4799-1743-3},
}