Wei Chang, Yu-Guang Chen, Po-Yeh Huang, Jin-Fu Li. An Aging-Aware CMOS SRAM Structure Design for Boolean Logic In-Memory Computing. In Luigi Dilillo, Luca Cassano, Athanasios Papadimitriou, editors, 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2021, Athens, Greece, October 6-8, 2021. pages 1-4, IEEE, 2021. [doi]
Abstract is missing.