Low jitter and multirate clock and data recovery circuit using a MSADLL for chip-to-chip interconnection

Hsiang-Hui Chang, Rong-Jyi Yang, Shen-Iuan Liu. Low jitter and multirate clock and data recovery circuit using a MSADLL for chip-to-chip interconnection. IEEE Trans. on Circuits and Systems, 51-I(12):2356-2364, 2004. [doi]

Abstract

Abstract is missing.