A strategy for fault tolerant reconfigurable Network-on-Chip design - researchr publication authors

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Navonil Chatterjee, Priyajit Mukherjee, Santanu Chattopadhyay. A strategy for fault tolerant reconfigurable Network-on-Chip design. In 20th International Symposium on VLSI Design and Test, VDAT 2016, Guwahati, India, May 24-27, 2016. pages 1-2, IEEE, 2016. [doi]

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