Fail-safe I/O to control RESET# pin of DDR3 SDRAM and achieve ultra-low system power

Rajat Chauhan, Prajkta Vyavahare, Siva Kothamasu. Fail-safe I/O to control RESET# pin of DDR3 SDRAM and achieve ultra-low system power. In Sixteenth International Symposium on Quality Electronic Design, ISQED 2015, Santa Clara, CA, USA, March 2-4, 2015. pages 357-360, IEEE, 2015. [doi]

@inproceedings{ChauhanVK15,
  title = {Fail-safe I/O to control RESET# pin of DDR3 SDRAM and achieve ultra-low system power},
  author = {Rajat Chauhan and Prajkta Vyavahare and Siva Kothamasu},
  year = {2015},
  doi = {10.1109/ISQED.2015.7085451},
  url = {http://dx.doi.org/10.1109/ISQED.2015.7085451},
  researchr = {https://researchr.org/publication/ChauhanVK15},
  cites = {0},
  citedby = {0},
  pages = {357-360},
  booktitle = {Sixteenth International Symposium on Quality Electronic Design, ISQED 2015, Santa Clara, CA, USA, March 2-4, 2015},
  publisher = {IEEE},
  isbn = {978-1-4799-7581-5},
}