Yu-Hsiang Chen, Chia-Ming Hsu, Kuen-Jong Lee. Test Chips With Scan-Based Logic Arrays. IEEE Trans. on CAD of Integrated Circuits and Systems, 40(4):790-802, 2021. [doi]
@article{ChenHL21-1,
title = {Test Chips With Scan-Based Logic Arrays},
author = {Yu-Hsiang Chen and Chia-Ming Hsu and Kuen-Jong Lee},
year = {2021},
doi = {10.1109/TCAD.2020.3010478},
url = {https://doi.org/10.1109/TCAD.2020.3010478},
researchr = {https://researchr.org/publication/ChenHL21-1},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {40},
number = {4},
pages = {790-802},
}