Wei Chen, Cheng-Ta Hsieh, Massoud Pedram. Simultaneous gate sizing and placement. IEEE Trans. on CAD of Integrated Circuits and Systems, 19(2):206-214, 2000. [doi]
@article{ChenHP00:0,
title = {Simultaneous gate sizing and placement},
author = {Wei Chen and Cheng-Ta Hsieh and Massoud Pedram},
year = {2000},
doi = {10.1109/43.828549},
url = {http://doi.ieeecomputersociety.org/10.1109/43.828549},
researchr = {https://researchr.org/publication/ChenHP00%3A0},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {19},
number = {2},
pages = {206-214},
}