A Simulation Study of Scaling Capability toward 10nm for the 3D Stackable Gate-Controlled Thyristor (GCT) DRAM Device

Wei-Chen Chen, Hang-Ting Lue, Tzu-Hsuan Hsu, Keh-Chung Wang, Chih-Yuan Lu. A Simulation Study of Scaling Capability toward 10nm for the 3D Stackable Gate-Controlled Thyristor (GCT) DRAM Device. In IEEE International Memory Workshop, IMW 2023, Monterey, CA, USA, May 21-24, 2023. pages 1-4, IEEE, 2023. [doi]

Abstract

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