An FPGA aligner for short read mapping - researchr publication related

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Yupeng Chen, Bertil Schmidt, Douglas L. Maskell. An FPGA aligner for short read mapping. In Dirk Koch, Satnam Singh, Jim Tørresen, editors, 22nd International Conference on Field Programmable Logic and Applications (FPL), Oslo, Norway, August 29-31, 2012. pages 511-514, IEEE, 2012. [doi]

The following publications are possibly variants of this publication:

Accelerating short read mapping on an FPGA (abstract only)Yupeng Chen, Bertil Schmidt, Douglas L. Maskell. fpga 2012: 265 [doi]

ASAP: Accelerated Short Read Alignment on Programmable Hardware (Abstract Only)Subho S. Banerjee, Mohamed El-Hadedy, Jong Bin Lim, Daniel Chen, Zbigniew T. Kalbarczyk, Deming Chen, Ravishankar K. Iyer. fpga 2017: 293-294 [doi]

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