Combining technology mapping and placement for delay-minimization in FPGA designs - researchr publication

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Chau-Shen Chen, Yu-Wen Tsay, TingTing Hwang, Allen C.-H. Wu, Youn-Long Lin. Combining technology mapping and placement for delay-minimization in FPGA designs. IEEE Trans. on CAD of Integrated Circuits and Systems, 14(9):1076-1084, 1995. [doi]

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