Utilization of multi-bit flip-flops for clock power reduction

Zhi-Wei Chen, Jin-Tai Yan. Utilization of multi-bit flip-flops for clock power reduction. In 19th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2012, Seville, Spain, December 9-12, 2012. pages 677-680, IEEE, 2012. [doi]

Abstract

Abstract is missing.