A 11μW 250 Hz BW two-step incremental ADC with 100 dB DR and 91 dB SNDR for integrated sensor interfaces - researchr publication related

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Chia-Hung Chen, Yi Zhang, Tao He, Patrick Yin Chiang, Gabor C. Temes. A 11μW 250 Hz BW two-step incremental ADC with 100 dB DR and 91 dB SNDR for integrated sensor interfaces. In Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, CICC 2014, San Jose, CA, USA, September 15-17, 2014. pages 1-4, IEEE, 2014. [doi]

The following publications are possibly variants of this publication:

A two-capacitor SAR-assisted multi-step incremental ADC with a single amplifier achieving 96.6 dB SNDR over 1.2 kHz BWYi Zhang, Chia-Hung Chen, Tao He, Kazuki Sobue, Koichi Hamashita, Gabor C. Temes. cicc 2017: 1-4 [doi]

Noise-Shaping SAR ADC Using a Two-Capacitor Digitally Calibrated DAC with 85.1 dB DR and 91 dB SFDRLukang Shi, Eashwar Thaigarajan, Rajiv Singh, Erhan Hancioglu, Un-Ku Moon, Gabor C. Temes. mwscas 2020: 353-356 [doi]

A 677-μW 90-dB DR 16-kHz BW Incremental ΔΣ ADC for Sensor InterfacesChia-Wei Kao, Che-Wei Hsu, Jia-Sheng Huang, Yu-Cheng Huang, Shih-Che Kuo, Chia-Hung Chen. vlsi-dat 2021: 1-2 [doi]

A 107.6 dB-DR Three-Step Incremental ADC for Motion-Tolerate Biopotential Signals RecordingLairong Fang, Shuwen Zhang, Yijie Li, Shunmin Wu, Xiaoyang Zeng, Zhiliang Hong, Jiawei Xu 0001. tbcas, 18(1):111-122, February 2024. [doi]

A 10-MHz BW 77.9 dB SNDR DT MASH Δ!Σ ADC With NC-VCO-Based Quantizer and OPAMP SharingMahmoud Sadollahi, Gabor C. Temes. tcas, 66-I(9):3384-3392, 2019. [doi]

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