Lei Cheng, Deming Chen, Martin D. F. Wong, Mike Hutton, Jason Govig. Timing constraint-driven technology mapping for FPGAs considering false paths and multi-clock domains. In Georges G. E. Gielen, editor, 2007 International Conference on Computer-Aided Design (ICCAD 07), November 5-8, 2007, San Jose, CA, USA. pages 370-375, IEEE, 2007. [doi]
@inproceedings{ChengCWHG07,
title = {Timing constraint-driven technology mapping for FPGAs considering false paths and multi-clock domains},
author = {Lei Cheng and Deming Chen and Martin D. F. Wong and Mike Hutton and Jason Govig},
year = {2007},
doi = {10.1145/1326073.1326149},
url = {http://doi.acm.org/10.1145/1326073.1326149},
tags = {constraints},
researchr = {https://researchr.org/publication/ChengCWHG07},
cites = {0},
citedby = {0},
pages = {370-375},
booktitle = {2007 International Conference on Computer-Aided Design (ICCAD 07), November 5-8, 2007, San Jose, CA, USA},
editor = {Georges G. E. Gielen},
publisher = {IEEE},
isbn = {1-4244-1382-6},
}