A 40-170 MHz PLL-Based PWM Driver Using 2-/3-/5-Level Class-D PA in 130 nm CMOS

Kunhee Cho, Ranjit Gharpurey. A 40-170 MHz PLL-Based PWM Driver Using 2-/3-/5-Level Class-D PA in 130 nm CMOS. J. Solid-State Circuits, 51(11):2639-2650, 2016. [doi]

Authors

Kunhee Cho

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Ranjit Gharpurey

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