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Kunhee Cho, Ranjit Gharpurey. A 40-170 MHz PLL-Based PWM Driver Using 2-/3-/5-Level Class-D PA in 130 nm CMOS. J. Solid-State Circuits, 51(11):2639-2650, 2016. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: A Digitally Intensive Transmitter/PA Using RF-PWM With Carrier Switching in 130 nm CMOSKunhee Cho, Ranjit Gharpurey. jssc, 51(5):1188-1199, 2016. [doi] A CMOS Class-D Line Driver Employing a Phase-Locked Loop Based PWM GeneratorJingxue Lu, Hyejeong Song, Ranjit Gharpurey. jssc, 49(3):729-739, 2014. [doi]
The following publications are possibly variants of this publication: