B. Chung, J. B. Kuo. Gate-level dual-threshold static power optimization methodology (GDSPOM) using path-based static timing analysis (STA) technique for SOC application. Integration, 41(1):9-16, 2008. [doi]
@article{ChungK08,
title = {Gate-level dual-threshold static power optimization methodology (GDSPOM) using path-based static timing analysis (STA) technique for SOC application},
author = {B. Chung and J. B. Kuo},
year = {2008},
doi = {10.1016/j.vlsi.2007.03.001},
url = {http://dx.doi.org/10.1016/j.vlsi.2007.03.001},
tags = {optimization, analysis, static analysis},
researchr = {https://researchr.org/publication/ChungK08},
cites = {0},
citedby = {0},
journal = {Integration},
volume = {41},
number = {1},
pages = {9-16},
}