Gate-level dual-threshold static power optimization methodology (GDSPOM) using path-based static timing analysis (STA) technique for SOC application

B. Chung, J. B. Kuo. Gate-level dual-threshold static power optimization methodology (GDSPOM) using path-based static timing analysis (STA) technique for SOC application. Integration, 41(1):9-16, 2008. [doi]

Abstract

Abstract is missing.