The following publications are possibly variants of this publication:
- The swapping binary-window DAC switching technique for SAR ADCsYung-Hui Chung. iscas 2013: 2231-2234 [doi]
- A 12-bit SAR ADC With a DAC-Configurable Window Switching SchemeYung-Hui Chung, Qi-Feng Zeng, Yi-Shen Lin. tcas, 67-I(2):358-368, 2020. [doi]
- A 12-bit 40-MS/s SAR ADC With a Fast-Binary-Window DAC Switching SchemeYung-Hui Chung, Chia-Wei Yen, Pei-Kang Tsai, Bo-Wei Chen. tvlsi, 26(10):1989-1998, 2018. [doi]
- A 12-bit 10-MS/s SAR ADC with a binary-window DAC switching scheme in 180-nm CMOSYung-Hui Chung, Chia-Wei Yen, Pei-Kang Tsai. ijcta, 46(4):748-763, 2018. [doi]
- Non-binary digital calibration for split-capacitor DAC in SAR ADCYawei Guo, Yue Wu, Dongdong Guo, Xu Cheng, Zhiyi Yu, Xiaoyang Zeng. ieiceee, 12(4):20150001, 2015. [doi]
- A 12-bit 20-MS/s SAR ADC With Fast-Binary-Window DAC Switching in 180nm CMOSYung-Hui Chung, Yi-Shen Lin, Qi-Feng Zeng. apccas 2018: 34-37 [doi]
- A 102dB-SFDR 16-bit Calibration-Free SAR ADC in 180-nm CMOSYung-Hui Chung, Chia-Hui Tien, Qi-Feng Zeng. apccas 2019: 5-8 [doi]