Stuck-At-Fault Testability of SPP Three-Level Logic Forms

Valentina Ciriani, Anna Bernasconi, Rolf Drechsler. Stuck-At-Fault Testability of SPP Three-Level Logic Forms. In Manfred Glesner, Ricardo Augusto da Luz Reis, Leandro Soares Indrusiak, Vincent John Mooney III, Hans Eveking, editors, VLSI-SOC: From Systems to Chips - IFIP TC 10/ WG 10.5 Twelfth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2003), December 1-3, 2003, Darmstadt, Germany. Volume 200 of IFIP, pages 299-313, Springer, 2003. [doi]

Abstract

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