An Improved Algorithm for Performance Optimal Technology Mapping with Retiming in LUT-Based FPGA Desig

Jason Cong, Chang Wu. An Improved Algorithm for Performance Optimal Technology Mapping with Retiming in LUT-Based FPGA Desig. In 1996 International Conference on Computer Design (ICCD 96), VLSI in Computers and Processors, October 7-9, 1996, Austin, TX, USA, Proceedings. pages 572-578, IEEE Computer Society, 1996. [doi]

Abstract

Abstract is missing.