A 3.125 Gb/s limit amplifier in CMOS with 42 dB gain and 1 /spl mu/s offset compensation

Ethan Crain, Michael H. Perrott. A 3.125 Gb/s limit amplifier in CMOS with 42 dB gain and 1 /spl mu/s offset compensation. J. Solid-State Circuits, 41(2):443-451, 2006. [doi]

Abstract

Abstract is missing.