A 32-bit GaAs IEEE floating point multiplier using Trailing-1 s rounding algorithm

S. Cui, Neil Burgess, Michael J. Liebelt, Kamran Eshraghian. A 32-bit GaAs IEEE floating point multiplier using Trailing-1 s rounding algorithm. In Lakhmi C. Jain, editor, Electronic Technology Directions to the Year 2000, May 23-25, 1995, Adelaide, Australia, Proceedings. pages 246-252, IEEE Computer Society, 1995. [doi]

Abstract

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