An improved output compaction technique for built-in self-test in VLSI circuits

Sunil R. Das, H. T. Ho, Wen-Ben Jone, A. R. Nayak. An improved output compaction technique for built-in self-test in VLSI circuits. In 8th International Conference on VLSI Design (VLSI Design 1995), 4-7 January 1995, New Delhi, India. pages 403-407, IEEE Computer Society, 1995. [doi]

@inproceedings{DasHJN95,
  title = {An improved output compaction technique for built-in self-test in VLSI circuits},
  author = {Sunil R. Das and H. T. Ho and Wen-Ben Jone and A. R. Nayak},
  year = {1995},
  doi = {10.1109/ICVD.1995.512147},
  url = {http://doi.ieeecomputersociety.org/10.1109/ICVD.1995.512147},
  tags = {testing},
  researchr = {https://researchr.org/publication/DasHJN95},
  cites = {0},
  citedby = {0},
  pages = {403-407},
  booktitle = {8th International Conference on VLSI Design (VLSI Design 1995), 4-7 January 1995, New Delhi, India},
  publisher = {IEEE Computer Society},
}