Sunil R. Das, H. T. Ho, Wen-Ben Jone, A. R. Nayak. An improved output compaction technique for built-in self-test in VLSI circuits. In 8th International Conference on VLSI Design (VLSI Design 1995), 4-7 January 1995, New Delhi, India. pages 403-407, IEEE Computer Society, 1995. [doi]
Abstract is missing.