A Scheme for On-Chip Timing Characterization

Ramyanshu Datta, Gary D. Carpenter, Kevin J. Nowka, Jacob A. Abraham. A Scheme for On-Chip Timing Characterization. In 24th IEEE VLSI Test Symposium (VTS 2006), 30 April - 4 May 2006, Berkeley, California, USA. pages 24-29, IEEE Computer Society, 2006. [doi]

@inproceedings{DattaCNA06,
  title = {A Scheme for On-Chip Timing Characterization},
  author = {Ramyanshu Datta and Gary D. Carpenter and Kevin J. Nowka and Jacob A. Abraham},
  year = {2006},
  doi = {10.1109/VTS.2006.11},
  url = {http://doi.ieeecomputersociety.org/10.1109/VTS.2006.11},
  researchr = {https://researchr.org/publication/DattaCNA06},
  cites = {0},
  citedby = {0},
  pages = {24-29},
  booktitle = {24th IEEE VLSI Test Symposium (VTS 2006), 30 April - 4 May 2006, Berkeley, California, USA},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-2514-8},
}