Katsuhiko Degawa, Takafumi Aoki, Hiroshi Inokawa, Tatsuo Higuchi, Yasuo Takahashi. A Two-Bit-per-Cell Content-Addressable Memory Using Single-Electron Transistors. In 35th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2005), 18-21 May 2005, Calgary, Canada. pages 32-38, IEEE Computer Society, 2005. [doi]
Abstract is missing.