On-chip interconnections: impact of adjacent lines on timing

Denis Deschacht, Grégory Servel. On-chip interconnections: impact of adjacent lines on timing. In Proceedings of ASP-DAC 2001, Asia and South Pacific Design Automation Conference 2001, January 30-February 2, 2001, Yokohama, Japan. pages 539-544, ACM, 2001. [doi]

@inproceedings{DeschachtS01,
  title = {On-chip interconnections: impact of adjacent lines on timing},
  author = {Denis Deschacht and Grégory Servel},
  year = {2001},
  doi = {10.1145/370155.370527},
  url = {http://doi.acm.org/10.1145/370155.370527},
  researchr = {https://researchr.org/publication/DeschachtS01},
  cites = {0},
  citedby = {0},
  pages = {539-544},
  booktitle = {Proceedings of ASP-DAC 2001, Asia and South Pacific Design Automation Conference 2001, January 30-February 2, 2001, Yokohama, Japan},
  publisher = {ACM},
  isbn = {0-7803-6634-4},
}