Sergej Deutsch, Brion L. Keller, Vivek Chickermane, Subhasish Mukherjee, Navdeep Sood, Sandeep Kumar Goel, Ji-Jan Chen, Ashok Mehta, Frank Lee, Erik Jan Marinissen. DfT architecture and ATPG for Interconnect tests of JEDEC Wide-I/O memory-on-logic die stacks. In 2012 IEEE International Test Conference, ITC 2012, Anaheim, CA, USA, November 5-8, 2012. pages 1-10, IEEE Computer Society, 2012. [doi]
@inproceedings{DeutschKCMSGCMLM12,
title = {DfT architecture and ATPG for Interconnect tests of JEDEC Wide-I/O memory-on-logic die stacks},
author = {Sergej Deutsch and Brion L. Keller and Vivek Chickermane and Subhasish Mukherjee and Navdeep Sood and Sandeep Kumar Goel and Ji-Jan Chen and Ashok Mehta and Frank Lee and Erik Jan Marinissen},
year = {2012},
doi = {10.1109/TEST.2012.6401569},
url = {http://doi.ieeecomputersociety.org/10.1109/TEST.2012.6401569},
researchr = {https://researchr.org/publication/DeutschKCMSGCMLM12},
cites = {0},
citedby = {0},
pages = {1-10},
booktitle = {2012 IEEE International Test Conference, ITC 2012, Anaheim, CA, USA, November 5-8, 2012},
publisher = {IEEE Computer Society},
isbn = {978-1-4673-1594-4},
}