V. R. Devanathan, Lakshmanan Balasubramanian, Rubin A. Parekhji. New Methods for Simulation Speed-up and Test Qualification with Analog Fault Simulation. In 28th International Conference on VLSI Design, VLSID 2015, Bangalore, India, January 3-7, 2015. pages 363-368, IEEE Computer Society, 2015. [doi]
Abstract is missing.