Srikanth V. Devarapalli, Payman Zarkesh-Ha, Steven C. Suddarth. SEU-Hardened Dual Data Rate Flip-Flop Using C-Elements. In 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2010, Kyoto, Japan, October 6-8, 2010. pages 167-171, IEEE Computer Society, 2010. [doi]
@inproceedings{DevarapalliZS10-0,
title = {SEU-Hardened Dual Data Rate Flip-Flop Using C-Elements},
author = {Srikanth V. Devarapalli and Payman Zarkesh-Ha and Steven C. Suddarth},
year = {2010},
doi = {10.1109/DFT.2010.27},
url = {http://doi.ieeecomputersociety.org/10.1109/DFT.2010.27},
researchr = {https://researchr.org/publication/DevarapalliZS10-0},
cites = {0},
citedby = {0},
pages = {167-171},
booktitle = {25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2010, Kyoto, Japan, October 6-8, 2010},
publisher = {IEEE Computer Society},
isbn = {978-1-4244-8447-8},
}