Designing efficient accelerator of depthwise separable convolutional neural network on FPGA

Wei Ding, Zeyu Huang, Zunkai Huang, Li Tian, Hui Wang, Songlin Feng. Designing efficient accelerator of depthwise separable convolutional neural network on FPGA. Journal of Systems Architecture, 97:278-286, 2019. [doi]

Possibly Related Publications

The following publications are possibly variants of this publication: