An analog on-chip learning circuit architecture of the weight perturbation algorithm - researchr publication authors

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Francesco Diotalevi, Maurizio Valle, Gian Marco Bo, Ezio Biglieri, Daniele D. Caviglia. An analog on-chip learning circuit architecture of the weight perturbation algorithm. In IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings. pages 419-422, IEEE, 2000. [doi]

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