Francesco Diotalevi, Maurizio Valle, Gian Marco Bo, Ezio Biglieri, Daniele D. Caviglia. An analog on-chip learning circuit architecture of the weight perturbation algorithm. In IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings. pages 419-422, IEEE, 2000. [doi]
@inproceedings{DiotaleviVBBC00,
title = {An analog on-chip learning circuit architecture of the weight perturbation algorithm},
author = {Francesco Diotalevi and Maurizio Valle and Gian Marco Bo and Ezio Biglieri and Daniele D. Caviglia},
year = {2000},
doi = {10.1109/ISCAS.2000.857120},
url = {https://doi.org/10.1109/ISCAS.2000.857120},
researchr = {https://researchr.org/publication/DiotaleviVBBC00},
cites = {0},
citedby = {0},
pages = {419-422},
booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings},
publisher = {IEEE},
}