A 114-pW PMOS-only, trim-free voltage reference with 0.26% within-wafer inaccuracy for nW systems

Qing Dong, Kaiyuan Yang, David Blaauw, Dennis Sylvester. A 114-pW PMOS-only, trim-free voltage reference with 0.26% within-wafer inaccuracy for nW systems. In 2016 IEEE Symposium on VLSI Circuits, VLSIC 2016, Honolulu, HI, USA, June 15-17, 2016. pages 1-2, IEEE, 2016. [doi]

Authors

Qing Dong

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Kaiyuan Yang

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David Blaauw

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Dennis Sylvester

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