Testing the Logic Cells and Interconnect Resources for FPGAs

Abderrahim Doumar, Hideo Ito. Testing the Logic Cells and Interconnect Resources for FPGAs. In 8th Asian Test Symposium (ATS 99), 16-18 November 1999, Shanghai, China. pages 369-374, IEEE Computer Society, 1999. [doi]

Authors

Abderrahim Doumar

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Hideo Ito

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