Mindaugas Draidiiulis, Per Larsson-Edefors, Daniel Eckerbert, Henrik Eriksson. A power cut-off technique for gate leakage suppression [CMOS logic circuits]. In Michiel Steyaert, C. L. Claeys, editors, 33rd European Solid-State Circuits Conference, ESSCIRC 2004, Leuven, Belgium, September 21-23, 2004. pages 171-174, IEEE, 2004. [doi]
Abstract is missing.