Milenko Drinic, Darko Kirovski, Seapahn Megerian, Miodrag Potkonjak. Latency-Guided On-Chip Bus-Network Design. IEEE Trans. on CAD of Integrated Circuits and Systems, 25(12):2663-2673, 2006. [doi]
@article{DrinicKMP06,
title = {Latency-Guided On-Chip Bus-Network Design},
author = {Milenko Drinic and Darko Kirovski and Seapahn Megerian and Miodrag Potkonjak},
year = {2006},
doi = {10.1109/TCAD.2006.882488},
url = {http://dx.doi.org/10.1109/TCAD.2006.882488},
tags = {design},
researchr = {https://researchr.org/publication/DrinicKMP06},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {25},
number = {12},
pages = {2663-2673},
}