ASIC BIST Synthesis: A VHDL Approach - researchr publication authors

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Tom Eberle, Robert McVay, Chris Meyers, Jason Moore. ASIC BIST Synthesis: A VHDL Approach. In Proceedings IEEE International Test Conference 1996, Test and Design Validity, Washington, DC, USA, October 20-25, 1996. pages 741-750, IEEE Computer Society, 1996.

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