ASIC BIST Synthesis: A VHDL Approach

Tom Eberle, Robert McVay, Chris Meyers, Jason Moore. ASIC BIST Synthesis: A VHDL Approach. In Proceedings IEEE International Test Conference 1996, Test and Design Validity, Washington, DC, USA, October 20-25, 1996. pages 741-750, IEEE Computer Society, 1996.

Abstract

Abstract is missing.