ASIC BIST Synthesis: A VHDL Approach

Tom Eberle, Robert McVay, Chris Meyers, Jason Moore. ASIC BIST Synthesis: A VHDL Approach. In Proceedings IEEE International Test Conference 1996, Test and Design Validity, Washington, DC, USA, October 20-25, 1996. pages 741-750, IEEE Computer Society, 1996.

@inproceedings{EberleMMM96,
  title = {ASIC BIST Synthesis: A VHDL Approach},
  author = {Tom Eberle and Robert McVay and Chris Meyers and Jason Moore},
  year = {1996},
  tags = {systematic-approach},
  researchr = {https://researchr.org/publication/EberleMMM96},
  cites = {0},
  citedby = {0},
  pages = {741-750},
  booktitle = {Proceedings IEEE International Test Conference 1996, Test and Design Validity, Washington, DC, USA, October 20-25, 1996},
  publisher = {IEEE Computer Society},
  isbn = {0-7803-3541-4},
}